EAMFCO / ENGINEERING TOOLS
Electrical calculations.
Made clear.
Four practical calculators for low-voltage design.
Choose a tool. Enter your data. See the result.
Choose your calculator
04 tools / one workspace
Power quality
Capacitor bank sizing
kVAr needed to raise the power factor of a load, rounded up to whole steps.
Method & engineering notes
Finds the reactive power needed to raise the power factor of a three phase load, then rounds it up to whole capacitor steps.
Key relation: Qc = P (tan φ1 − tan φ2)
Worked calculation
Notes
- Loading factor. When the real load is unknown, the current is taken as the incomer rating times an expected loading, 0.7 by default. If the actual load is lower, the kVAr needed is lower too.
- PF1. Enter displacement cos φ for an initially lagging load. For harmonic-rich loads, true power factor and total RMS current cannot be substituted for the fundamental quantities in this model.
- Steps. The bank is rounded up to whole steps. An automatic controller follows the load. Confirm the smallest step against the minimum reactive demand to avoid overcompensation.
- Generators. Confirm the generator manufacturer's reactive-power limits and the bank switching/interlock strategy before operation on a generator supply.
Engineering reference: ABB Technical Application Paper 8, sections 7 and 8.
Power quality
Capacitor step output
Fundamental kVAr, capacitor voltage and tuning at your site voltage and frequency.
Method & engineering notes
A capacitor's nameplate kVAr holds at its rated voltage and frequency. This tool calculates ideal fundamental-frequency output from capacitance and optional series inductance for a balanced three-phase step.
Key relation: Q = V² / (Xc − XL)
Worked calculation
Notes
- Capacitor alone. At constant capacitance and voltage, fundamental output is proportional to frequency: 60 Hz gives 20% more kVAr than 50 Hz. With a reactor, use the full LC relation instead.
- C and L are per phase, star equivalent. For a delta connected capacitor, each of the three internal elements is C / 3.
- Capacitor voltage. A series reactor raises the fundamental capacitor voltage to V / (1 − psite). Include network voltage tolerance and harmonic voltage when selecting its rating.
- Reactor data. Prefer the manufacturer's inductance per phase. Inferred inductance is valid only when the entered kVAr is the net output of the matched LC step at its stated network voltage and frequency.
- Component selection. This ideal fundamental-frequency model excludes capacitance/inductance tolerances, harmonic currents, reactor saturation and thermal ratings. The voltage indication alone does not establish a suitable capacitor-reactor combination.
Engineering reference: ABB Technical Application Paper 8, section 8 and Annex B.
Short circuit
Transformer fault level
Maximum short circuit current at the LV terminals of a transformer.
Method & engineering notes
Maximum three phase short circuit current at the LV terminals of a distribution transformer, from the MV network and the transformer only. Cables, busbars and motors are not included.
Key relation: IEC 60909-0
Worked calculation
Notes
- Voltage factor. For LV systems IEC 60909-0 gives cmax = 1.05 when the voltage tolerance is +6% and 1.10 when it is +10%. The same cmax enters the transformer correction KT.
- Feeder. When RQ / XQ is not known, IEC 60909-0 allows RQ = 0.1 XQ with XQ = 0.995 ZQ. The feeder impedance is referred to the LV side with the square of the transformer ratio.
- Correction KT. Applied to network transformers for maximum short circuit currents.
- Scope. One two-winding network transformer and one upstream radial source at nominal tap. This tool does not model minimum faults, earth-fault sequence networks, multiple transformers, generators or converter sources.
- Motors. Motor contribution is not included. Add it per IEC 60909-0 when running motors are significant.
- Panel rating. Check declared Icw and duration, Ipk or conditional Icc against the actual fault duty and protective device let-through. The IEC 61439 factor n relates rated Icw to a test peak; applying it to the calculated fault current does not establish assembly suitability.
Engineering reference: Schneider Electric, Conext CL125 Solution Guide, section 4.
Conductors
Busbar sizing
A preliminary copper area and bar arrangement for your chosen current density.
Method & engineering notes
Finds the fewest flat copper bars per phase, and the least copper among them, that keep the current density at or below your design value. The selection uses the widths and thicknesses you enter.
Key relation: A ≥ In / J
Worked calculation
Notes
- A selection guide. Current density is a starting point. The final busbar is confirmed by the temperature rise verification of the assembly to IEC 61439-1, for the actual enclosure, layout, ventilation and ambient.
- Short circuit. Check the bars and their supports against Icw and Ipk of the assembly.
- Several bars. Use the bar orientation, spacing, joints and supports of the verified assembly design. Skin and proximity effects and unequal current sharing are not modelled here.
- Widths. The example list stops at 120 mm, so larger currents require several bars. Add 160 or 200 if you stock them.
Engineering reference: ABB Technical Application Paper 11, sections 7 and 8.